AT503S16 datasheet pdf

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Dec 15, 2025, 10:06 AM

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AT503S16 datasheet pdf

Datasheet Information

Pages: 4

PHASE CONTROL THYRISTORAT503 Repetitive voltage up to1600V Mean on-state current445A Surge current6.4kA FINAL SPECIFICATION gen 03 - ISSUE : 03 SymbolCharacteristicConditions Tj [°C] ValueUnit BLOCKING VRRMRepetitive peak reverse voltage1251600V V RSMNon-repetitive peak reverse voltage1251700V V DRMRepetitive peak off-state voltage1251600V I RRMRepetitive peak reverse currentV=VRRM12530mA I DRMRepetitive peak off-state currentV=VDRM12530mA CONDUCTING IT (AV)Mean on-state current180° sin, 50 Hz, Th=55°C, double side cooled445A I T (AV)Mean on-state current180° sin, 50 Hz, Tc=85°C, double side cooled355A I TSMSurge on-state currentsine wave, 10 ms1256.4kA I² tI² twithout reverse voltage205 x1E3A²s V TOn-state voltageOn-state current = 800 A251.45V V T(TO)Threshold voltage1250.9V r TOn-state slope resistance1250.680mohm SWITCHING di/dtCritical rate of rise of on-state current, min.From 75% VDRM up to 500 A, gate 10V 5ohm 125200A/μs dv/dtCritical rate of rise of off-state voltage, min.Linear ramp up to 70% of VDRM125500V/μs tdGate controlled delay time, typicalVD=100V, gate source 10V, 10 ohm , tr=.5 μs251.6μs tqCircuit commutated turn-off time, typicaldV/dt = 20 V/μs linear up to 75% VDRM200μs Q rrReverse recovery chargedi/dt=-20 A/μs, I= 330A125μC I rrPeak reverse recovery currentVR= 50 VA I HHolding current, typicalVD=5V, gate open circuit25300mA I LLatching current, typicalVD=5V, tp=30μs25700mA GATE VGTGate trigger voltageVD=5V253.5V I GTGate trigger currentVD=5V25200mA V GDNon-trigger gate voltage, min.VD=VDRM1250.25V V FGMPeak gate voltage (forward) 20V I FGMPeak gate current 8A V RGMPeak gate voltage (reverse) 5V P GMPeak gate power dissipationPulse width 100 μs 75W P GAverage gate power dissipation 1W MOUNTING Rth(j-h)Thermal impedance, DCJunction to heatsink, double side cooled95°C/kW R th(c-h)Thermal impedanceCase to heatsink, double side cooled20°C/kW T jOperating junction temperature -30 / 125°C FMounting force 4.9 / 5.9kN Mass55g ORDERING INFORMATION : AT503 S 16 standard specification VDRM&VRRM/100 POSEICO SPA POwer SEmiconductors Italian COrporation POSEICO POSEICO SPA Via N. Lorenzi 8, 16152 Genova - ITALY Tel. ++ 39 010 6556234 - Fax ++ 39 010 6557519 Sales Office: Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510

Specifications
PHASE CONTROL THYRISTORAT503 Repetitive voltage up to1600V Mean on-state current445A Surge current6.4kA FINAL SPECIFICATION gen 03 - ISSUE : 03 SymbolCharacteristicConditions Tj [°C] ValueUnit BLOCKING VRRMRepetitive peak reverse voltage1251600V V RSMNon-repetitive peak reverse voltage1251700V V DRMRepetitive peak off-state voltage1251600V I RRMRepetitive peak reverse currentV=VRRM12530mA I DRMRepetitive peak off-state currentV=VDRM12530mA CONDUCTING IT (AV)Mean on-state current180° sin, 50 Hz, Th=55°C, double side cooled445A I T (AV)Mean on-state current180° sin, 50 Hz, Tc=85°C, double side cooled355A I TSMSurge on-state currentsine wave, 10 ms1256.4kA I² tI² twithout reverse voltage205 x1E3A²s V TOn-state voltageOn-state current = 800 A251.45V V T(TO)Threshold voltage1250.9V r TOn-state slope resistance1250.680mohm SWITCHING di/dtCritical rate of rise of on-state current, min.From 75% VDRM up to 500 A, gate 10V 5ohm 125200A/μs dv/dtCritical rate of rise of off-state voltage, min.Linear ramp up to 70% of VDRM125500V/μs tdGate controlled delay time, typicalVD=100V, gate source 10V, 10 ohm , tr=.5 μs251.6μs tqCircuit commutated turn-off time, typicaldV/dt = 20 V/μs linear up to 75% VDRM200μs Q rrReverse recovery chargedi/dt=-20 A/μs, I= 330A125μC I rrPeak reverse recovery currentVR= 50 VA I HHolding current, typicalVD=5V, gate open circuit25300mA I LLatching current, typicalVD=5V, tp=30μs25700mA GATE VGTGate trigger voltageVD=5V253.5V I GTGate trigger currentVD=5V25200mA V GDNon-trigger gate voltage, min.VD=VDRM1250.25V V FGMPeak gate voltage (forward) 20V I FGMPeak gate current 8A V RGMPeak gate voltage (reverse) 5V P GMPeak gate power dissipationPulse width 100 μs 75W P GAverage gate power dissipation 1W MOUNTING Rth(j-h)Thermal impedance, DCJunction to heatsink, double side cooled95°C/kW R th(c-h)Thermal impedanceCase to heatsink, double side cooled20°C/kW T jOperating junction temperature -30 / 125°C FMounting force 4.9 / 5.9kN Mass55g ORDERING INFORMATION : AT503 S 16 standard specification VDRM&VRRM/100 POSEICO SPA POwer SEmiconductors Italian COrporation POSEICO POSEICO SPA Via N. Lorenzi 8, 16152 Genova - ITALY Tel. ++ 39 010 6556234 - Fax ++ 39 010 6557519 Sales Office: Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510

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